CPC G06F 1/28 (2013.01) [H01L 25/18 (2013.01)] | 17 Claims |
1. A processor, comprising:
a first base integrated circuit (IC) die configured to provide, based at least in part on an indication of a configuration of a first plurality of compute dies stacked on top of the first base IC die, a different power domain to each of the first plurality of compute dies, each of the different power domains corresponding to a different power plane,
wherein the first base IC die is configured to unify power domains of two or more voltage regulator networks of a plurality of voltage regulator networks to provide a first independent power plane to a first compute die of the first plurality of compute dies.
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