US 12,279,439 B2
Semiconductor storage device
Yuki Inuzuka, Yokohama Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Sep. 7, 2021, as Appl. No. 17/468,229.
Claims priority of application No. 2021-045100 (JP), filed on Mar. 18, 2021.
Prior Publication US 2022/0302214 A1, Sep. 22, 2022
Int. Cl. H10B 63/00 (2023.01); H10N 70/20 (2023.01)
CPC H10B 63/30 (2023.02) [H10B 63/20 (2023.02); H10B 63/84 (2023.02); H10N 70/231 (2023.02)] 11 Claims
OG exemplary drawing
 
1. A semiconductor storage device comprising:
a plurality of first wires;
a plurality of second wires;
first and second transistors connected to one or ones of the first wires and configured to respectively transfer a first voltage and a second voltage lower than the first voltage to the connected first wire or wires;
third and fourth transistors connected to the second wires and configured to respectively transfer the first and second voltages to the second wires;
a first memory cell including a first diode and a first memory element connected in series, the first memory cell being connected between a first signal line of the second wires and one of the first wires in such a manner that a forward bias direction of the first diode is from the one first wire to the first signal line; and
a second memory cell including a second diode and a second memory element connected in series, the second memory cell being connected between a second signal line of the second wires and the one of the first wires in such a manner that a forward bias direction of the second diode is from the second signal line to the one first wire.