US 12,279,430 B2
Configurable capacitors with 3D non-volatile array
Liang Li, Shanghai (CN); Xuan Tian, Shanghai (CN); Zhen Qin, Shanghai (CN); Yanli Zhang, San Jose, CA (US); and Yan Li, Milpitas, CA (US)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by Western Digital Technologies, Inc., San Jose, CA (US)
Filed on Sep. 28, 2022, as Appl. No. 17/954,757.
Prior Publication US 2024/0114685 A1, Apr. 4, 2024
Int. Cl. H10B 43/27 (2023.01); G11C 5/10 (2006.01); G11C 11/24 (2006.01); G11C 16/04 (2006.01); G11C 16/30 (2006.01); H10B 43/10 (2023.01); H10B 43/40 (2023.01); H10B 41/27 (2023.01)
CPC H10B 43/27 (2023.02) [G11C 5/10 (2013.01); G11C 11/24 (2013.01); G11C 16/0483 (2013.01); G11C 16/30 (2013.01); H10B 43/40 (2023.02); G11C 2213/75 (2013.01); H10B 43/10 (2023.02)] 10 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a stack of alternating layers of dielectric and conductive materials on a substrate, a first portion of the stack of alternating layers forming a plurality of blocks of NAND memory, a second portion of the stack of alternating layers forming a configurable capacitor structure which is configurable to form one or more capacitors of configurable capacitance, the configurable capacitor structure includes a plurality of capacitive units, each capacitive unit includes a plurality of capacitive elements that are each formed in common layers of conductive material separated by a layer of dielectric material of the stack and one or more capacitive unit further includes a plurality of switches that are configurable to selectively connect capacitive elements of the capacitive unit in series or in parallel.