| CPC H04W 76/14 (2018.02) [H04L 1/0693 (2013.01); H04W 72/0446 (2013.01); H04W 72/121 (2013.01)] | 20 Claims |
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1. An apparatus configured for wireless communications, comprising:
one or more memories comprising processor-executable instructions; and
one or more processors configured to execute the processor-executable instructions and cause the apparatus to:
receive signaling that includes a configuration of:
a first resource pool with a plurality of sidelink feedback channel resources, wherein:
the first resource pool comprises a plurality of interlace groups,
each of the plurality of interlace groups comprises a plurality of partial interlace groups, and
each of the plurality of partial interlace groups comprises at least two resource blocks, and
an amount of resource blocks for each of the plurality of partial interlace groups;
receive, from a user equipment (UE), one or more sidelink data messages during a time period having a duration of a first number of slots that is greater than one; and
transmit, to the UE, via a first sidelink feedback channel resource included in the first resource pool, a first feedback message comprising one or more feedback bits associated with the one or more sidelink data messages, wherein:
the first sidelink feedback channel resource occupies resource elements from at least two resource blocks transmitted in a comb pattern in a frequency domain, and
the at least two resource blocks belong to a first interlace group of the plurality of interlace groups.
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