US 12,278,695 B2
Method and apparatus for acquiring timestamp of data stream, storage medium, and electronic apparatus
Yan Zhou, Guangdong (CN)
Assigned to SANECHIPS TECHNOLOGY CO., LTD., Shenzhen (CN)
Appl. No. 17/765,417
Filed by ZTE CORPORATION, Guangdong (CN)
PCT Filed Sep. 28, 2020, PCT No. PCT/CN2020/118316
§ 371(c)(1), (2) Date Mar. 30, 2022,
PCT Pub. No. WO2021/063303, PCT Pub. Date Apr. 8, 2021.
Claims priority of application No. 201910944071.X (CN), filed on Sep. 30, 2019.
Prior Publication US 2022/0360350 A1, Nov. 10, 2022
Int. Cl. H04J 3/06 (2006.01); H03M 9/00 (2006.01); H04L 7/00 (2006.01)
CPC H04J 3/0661 (2013.01) [H03M 9/00 (2013.01); H04L 7/0012 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method for acquiring a timestamp of a data stream, comprising:
receiving a data stream to be transmitted, and acquiring a first frame header identifier of the data stream to be transmitted in a serializer-deserializer (SERDES) clock mode, wherein the first frame header identifier represents a position of a frame header of the data stream to be transmitted;
determining, based on the first frame header identifier, a timestamp of the data stream to be transmitted under a system clock;
encapsulating the timestamp to obtain a first target data frame; and
outputting the first target data frame;
wherein receiving the data stream to be transmitted and acquiring the first frame header identifier of the data stream to be transmitted in the SERDES clock mode comprise:
receiving the data stream to be transmitted, and demultiplexing the data stream to be transmitted in the SERDES clock mode, to obtain data of N logic lanes, wherein N is an integer;
acquiring a position of a frame header of data of each logic lane when the position of the frame header of the data of each logic lane is determined to obtain a second frame header identifier of the data of each logic lane; and
determining the first frame header identifier based on the second frame header identifier of the data of each logic lane.