| CPC H03M 1/56 (2013.01) | 23 Claims |

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1. A device comprising:
an input to receive a clock signal;
a ramp start program register;
a ramp start active register;
a ramp stop program register;
a ramp stop active register;
a ramp slope program register;
a ramp slope active register;
an update controller, the update controller to update, based on a programmable condition, respectively, the ramp start active register contents with a content of the ramp start program register, the ramp stop active register contents with a content of the ramp stop program register contents and the ramp slope active register contents with a content of the ramp slope program register contents, and
a ramp controller to generate a ramp signal, the ramp signal to begin at the value reflective of the ramp start active register contents, the ramp signal to change value at each cycle of the clock signal based at least on the value reflective of the ramp slope active register contents, and the ramp signal to stop at the value reflective of the ramp stop active register contents.
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