| CPC H02M 1/32 (2013.01) [H02M 1/08 (2013.01); H02M 1/36 (2013.01); H02M 7/487 (2013.01); H02M 7/5395 (2013.01); H03K 17/08122 (2013.01); H03K 17/284 (2013.01)] | 16 Claims |
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1. A power conversion device, comprising:
a leg including:
a first switching element, a second switching element, a third switching element, a fourth switching element connected in series with each other;
a first diode, a second diode, a third diode, and a fourth diode respectively connected in anti-parallel to the first switching element, the second switching element, the third switching element, and the fourth switching element; and
a fifth diode and a sixth diode connected in series with each other, wherein the fifth diode and the sixth diode are disposed between and respectively connected to a connection point between the first switching element and the second switching element and a connection point between the third switching element and the fourth switching element;
a smoothing unit including:
a Direct Current (DC) positive terminal connected to a drain terminal of the first switching element;
a DC negative terminal connected to a source terminal of the fourth switching element;
a first capacitor disposed between the DC positive terminal and a neutral point; and
a second capacitor disposed between the neutral point and the DC negative terminal, wherein the first capacitor and the second capacitor are connected in series;
an Alternating Current (AC) terminal connected to a connection point between the second switching element and the third switching element;
a gate driver configured to control an on or off state of each of the first switching element, the second switching element, the third switching element and the fourth switching element, based on voltage outputs from each of the DC positive terminal, the DC negative terminal, and the neutral point;
a pulse width modulation controller configured to output, to the gate driver:
a first pulse width modulation signal for controlling the first switching element;
a second pulse width modulation signal for controlling the second switching element;
a third pulse width modulation signal for controlling the third switching element; and
a fourth pulse width modulation signal for controlling the fourth switching element;
a first signal delay unit provided between the pulse width modulation controller and the gate driver, delaying the second pulse width modulation signal by a predetermined delay time and outputting the delayed second pulse width modulation signal to the gate driver; and
a second signal delay unit provided between the pulse width modulation controller and the gate driver, delaying the third pulse width modulation signal by the predetermined delay time and outputting the delayed third pulse width modulation signal to the gate driver,
wherein the pulse width modulation controller outputs the first pulse width modulation signal and the fourth pulse width modulation signal to the gate driver, and outputs the second pulse width modulation signal and the third pulse width modulation signal to the first signal delay unit and the second signal delay unit, and
wherein, in response to a driving of the power conversion device stopping, the gate driver controls the second switching element to be turned off later than the first switching element for the predetermined delay time, and controls the third switching element to be turned off later than the fourth switching element for the predetermined delay time.
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