| CPC H01L 29/78391 (2014.09) [H01L 21/02068 (2013.01); H01L 29/40111 (2019.08); H01L 29/516 (2013.01); H01L 29/66795 (2013.01); H01L 29/6684 (2013.01); H01L 29/7851 (2013.01)] | 20 Claims |
|
1. A device, comprising:
first and second spacers on a substrate;
a high-k capacitor between the first and second spacers, wherein the high-k capacitor comprises:
a high-k dielectric layer on the substrate and sidewalls of the first and second spacers; and
an internal gate on the high-k dielectric layer; and
a ferroelectric capacitor on the high-k capacitor, wherein the ferroelectric capacitor comprises:
a ferroelectric dielectric layer on the internal gate, wherein a side surface of the ferroelectric dielectric layer comprises a convex portion and a concave portion, and wherein an interface between the internal gate and the ferroelectric dielectric layer is in contact with a boundary between a side surface of the internal gate and the convex portion of the side surface of the ferroelectric dielectric layer; and
an electrode on the ferroelectric dielectric layer.
|