US 12,278,286 B2
High voltage isolation devices for semiconductor devices
Michael A. Smith, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jan. 8, 2024, as Appl. No. 18/406,827.
Application 18/406,827 is a continuation of application No. 17/886,436, filed on Aug. 11, 2022, granted, now 11,901,448.
Application 17/886,436 is a continuation of application No. 17/095,475, filed on Nov. 11, 2020, granted, now 11,430,887, issued on Aug. 30, 2022.
Prior Publication US 2024/0154033 A1, May 9, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/78 (2006.01); H01L 29/10 (2006.01)
CPC H01L 29/7831 (2013.01) [H01L 29/1033 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first active area including a first outer region having a first column of bit line contacts;
a second active area including a second outer region having a second column of bit line contacts;
a plurality of first active channels connected to the first outer region and extending toward the second active area, each first active channel aligned to a corresponding first bit line contact in the first column of bit line contacts;
a plurality of second active channels connected to the second outer region and extending toward the first active area, each second active channel aligned to a corresponding second bit line contact in the second column of bit line contacts; and
a common gate over the plurality of first and second active channels, the common gate extending in a direction parallel to the first and second columns of bit line contacts.