US 12,278,277 B2
Fin field-effect transistor and method of forming the same
Sheng-Liang Pan, Hsinchu (TW); Yung Tzu Chen, Hsinchu (TW); Chung-Chieh Lee, Taipei (TW); Yung-Chang Hsu, Hsinchu (TW); Chia-Yang Hung, Kaohsiung (TW); Po-Chuan Wang, Hsinchu (TW); Guan-Xuan Chen, Hsinchu (TW); and Huan-Just Lin, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 16, 2024, as Appl. No. 18/443,994.
Application 18/443,994 is a continuation of application No. 17/195,967, filed on Mar. 9, 2021, granted, now 11,923,433.
Claims priority of provisional application 63/023,468, filed on May 12, 2020.
Prior Publication US 2024/0250150 A1, Jul. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 29/08 (2006.01); H01L 29/49 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/6656 (2013.01) [H01L 21/02126 (2013.01); H01L 21/0217 (2013.01); H01L 29/0847 (2013.01); H01L 29/4983 (2013.01); H01L 29/66545 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor device, comprising:
forming a first dielectric layer at least along sidewalls of a gate structure;
forming a second dielectric layer over the first dielectric layer;
forming a third dielectric layer over the second dielectric layer;
exposing respective portions of the first dielectric layer and second dielectric layer; and
oxidizing the third dielectric layer while limiting oxidation on the first dielectric layer and the second dielectric layer.