| CPC H01L 29/66537 (2013.01) [H01L 21/02129 (2013.01); H01L 21/823807 (2013.01); H01L 21/823878 (2013.01); H01L 27/092 (2013.01); H01L 29/0665 (2013.01); H01L 29/42392 (2013.01); H01L 29/66742 (2013.01); H01L 29/78645 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
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1. A method, comprising:
forming a diffusion blocking layer on a semiconductor substrate;
forming channel material layers over the diffusion blocking layer, wherein the diffusion blocking layer is underlying the channel material layers;
patterning the semiconductor substrate, the channel material layers, and the diffusion blocking layer to form a trench in the semiconductor substrate, thereby defining an active region being adjacent the trench and exposing sidewalls of the diffusion blocking layer in the trench;
forming an isolation feature in the trench, wherein the active region is protruding above the isolation feature, and wherein the isolation feature includes a dielectric liner and a dielectric material layer on the dielectric liner;
forming a solid doping source material layer on the isolation feature, wherein the solid doping source material layer includes a dopant; and
driving the dopant from the solid doping source material layer to the active region, thereby forming an anti-punch-through (APT) feature in the active region.
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12. A method, comprising:
forming a diffusion blocking layer on a semiconductor substrate;
forming channel material layers over the diffusion blocking layer;
patterning the semiconductor substrate, the channel material layers, and the diffusion blocking layer to form a trench in the semiconductor substrate, thereby defining a fin active region being adjacent the trench; and
forming an isolation feature in the trench, wherein the fin active region is protruding above the isolation feature, and wherein the isolation feature includes a dielectric liner and a dielectric material layer on the dielectric liner; and
depositing a borosilicate glass (BSG) layer on the isolation feature, wherein the BSG layer directly contacts the dielectric material layer and a vertical portion of the dielectric liner.
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17. A method, comprising:
forming a diffusion blocking layer on a semiconductor substrate;
epitaxially growing silicon films and silicon germanium films in an interleaving configuration on the diffusion blocking layer, wherein the diffusion blocking layer includes silicon germanium with a germanium concentration greater than that of the silicon germanium films;
patterning the semiconductor substrate, the silicon films and the silicon germanium films, and the diffusion blocking layer to form a trench in the semiconductor substrate, thereby defining a fin active region being adjacent the trench;
forming an isolation feature in the trench, wherein the fin active region is protruding above the isolation feature, and wherein the isolation feature includes a dielectric liner and a dielectric material layer on the dielectric liner; and
depositing a borosilicate glass (BSG) layer directly on the isolation feature, wherein the BSG layer directly contacts the dielectric material layer and a vertical portion of the dielectric liner.
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