US 12,278,264 B2
Semiconductor structure and method for guarding a low voltage surface region from a high voltage surface region
David Summerland, Nottingham (GB); Roger Light, Nottingham (GB); and Luke Knight, Nottingham (GB)
Appl. No. 17/760,048
Filed by Search For The Next, LTD, Nottingham (GB)
PCT Filed Feb. 4, 2021, PCT No. PCT/GB2021/050250
§ 371(c)(1), (2) Date Aug. 3, 2022,
PCT Pub. No. WO2021/156620, PCT Pub. Date Aug. 12, 2021.
Claims priority of application No. 2001477 (GB), filed on Feb. 4, 2020.
Prior Publication US 2023/0062444 A1, Mar. 2, 2023
Int. Cl. H01L 29/06 (2006.01); H01L 29/732 (2006.01)
CPC H01L 29/0646 (2013.01) [H01L 29/732 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a guard structure for guarding a high voltage region at a semiconductor surface from a low voltage region at the semiconductor surface, the guard structure comprising:
a first layer of a first type of semiconductor in contact with a second layer of a second type of semiconductor, the second layer providing the semiconductor surface;
a first trench and a second trench lying between the high voltage region and the low voltage region to isolate the high voltage region from the low voltage region, each of the first trench and the second trench extending from the semiconductor surface and substantially entirely through the second layer to define therebetween a sub-region of the second layer between the high voltage region and the low voltage region, the sub-region being isolated from the high voltage region and the low voltage region; and
the semiconductor device comprising a circuit that connects between the high voltage region and the low voltage region; the circuit arranged to generate an intermediate voltage; the circuit comprising an output connected to the sub-region for applying the intermediate voltage to the sub-region; the intermediate voltage having a value between a voltage of the respective high voltage region and a voltage of the low voltage region; and wherein the guard structure includes a first set of lateral trenches that extend between, and directly connect with, the first trench and the second trench across the sub-region to divide the sub-region into sub-divisions, and to isolate the sub-divisions from each other, and wherein the circuit comprises a separate output connected to each sub-division to apply a different intermediate voltage to each sub-division.