	US 12,278,234 B2
	Multi-fin FINFET device including epitaxial growth barrier on outside surfaces of outermost fins and related methods
Qing Liu, Irvine, CA (US); Prasanna Khare, Schenectady, NY (US); and Nicolas Loubet, Guilderland, NY (US)
Assigned to Bell Semiconductor, LLC, Chicago, IL (US)
Filed by Bell Semiconductor, LLC, Chicago, IL (US)
Filed on Feb. 21, 2023, as Appl. No. 18/171,914.
Application 16/751,036 is a division of application No. 16/049,685, filed on Jul. 30, 2018, granted, now 10,580,771, issued on Mar. 3, 2020.
Application 14/748,270 is a division of application No. 13/590,756, filed on Aug. 21, 2012, granted, now 9,093,556, issued on Jul. 28, 2015.
Application 18/171,914 is a continuation of application No. 17/365,682, filed on Jul. 1, 2021, granted, now 11,610,886.
Application 17/365,682 is a continuation of application No. 16/751,036, filed on Jan. 23, 2020, granted, now 11,069,682, issued on Jul. 20, 2021.
Application 16/049,685 is a continuation of application No. 15/209,662, filed on Jul. 13, 2016, granted, now 10,062,690, issued on Aug. 28, 2018.
Application 15/209,662 is a continuation of application No. 14/748,270, filed on Jun. 24, 2015, granted, now 9,419,111, issued on Aug. 16, 2016.
Prior Publication US 2023/0197720 A1, Jun. 22, 2023
Int. Cl. H01L 27/088 (2006.01); H01L 21/225 (2006.01); H01L 21/265 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 21/84 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)

CPC H01L 27/0886 (2013.01) [H01L 21/2253 (2013.01); H01L 21/26506 (2013.01); H01L 21/26513 (2013.01); H01L 21/2658 (2013.01); H01L 21/26586 (2013.01); H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 29/0847 (2013.01); H01L 29/41783 (2013.01); H01L 29/41791 (2013.01); H01L 29/66795 (2013.01); H01L 29/66803 (2013.01); H01L 29/785 (2013.01)]

21 Claims

1. A multi-fin FINFET device comprising:

a substrate;

a plurality of semiconductor fins extending upwardly from said substrate and being spaced apart along the substrate, each semiconductor fin having opposing first and second ends and a medial portion therebetween, outermost fins of said plurality of semiconductor fins comprising an epitaxial growth barrier on outside and top surfaces thereof and on portions of inner surfaces thereof adjacent the top surfaces, wherein the epitaxial growth barrier is not provided on an end surface of each end of each fin;

at least one gate overlying the medial portions of said semiconductor fins;

a plurality of raised epitaxial semiconductor source regions between said semiconductor fins adjacent the first ends thereof; and

a plurality of raised epitaxial semiconductor drain regions between said semiconductor fins adjacent the second ends thereof.