US 12,278,233 B2
Semiconductor device and manufacturing method thereof
Che-Cheng Chang, New Taipei (TW); and Chih-Han Lin, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED, Hsin-Chu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED, Hsin-Chu (TW)
Filed on May 3, 2021, as Appl. No. 17/246,874.
Application 15/729,987 is a division of application No. 15/009,760, filed on Jan. 28, 2016, granted, now 9,799,649, issued on Oct. 24, 2017.
Application 17/246,874 is a continuation of application No. 16/715,465, filed on Dec. 16, 2019, granted, now 10,998,312.
Application 16/715,465 is a continuation of application No. 15/729,987, filed on Oct. 11, 2017, granted, now 10,510,752, issued on Dec. 17, 2019.
Claims priority of provisional application 62/269,030, filed on Dec. 17, 2015.
Prior Publication US 2021/0257361 A1, Aug. 19, 2021
Int. Cl. H01L 27/088 (2006.01); H01L 21/306 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 27/0886 (2013.01) [H01L 21/30604 (2013.01); H01L 29/0657 (2013.01); H01L 29/0847 (2013.01); H01L 29/42364 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/785 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a semiconductor fin;
a first epitaxial structure on a first side of a channel portion of the semiconductor fin;
a second epitaxial structure on a second side of the channel portion of the semiconductor fin opposite to the first side of the channel portion of the semiconductor fin; and
a gate dielectric overlying the channel portion of the semiconductor fin, wherein:
the channel portion of the semiconductor fin has a first length measured in a first direction extending from the first epitaxial structure to the second epitaxial structure,
the gate dielectric has a second length measured in the first direction, wherein the second length is different than the first length, and
the first epitaxial structure is in direct contact with a first surface of the gate dielectric facing the first direction.