US 12,278,210 B2
Manufacturing method of semiconductor structure
Sheng Zhang, Singapore (SG); Kai Zhu, Singapore (SG); Chien-Kee Pang, Singapore (SG); and Chia-Liang Liao, Yunlin County (TW)
Assigned to United Microelectronics Corp., Hsinchu (TW)
Filed by United Microelectronics Corp., Hsinchu (TW)
Filed on Aug. 8, 2022, as Appl. No. 17/883,595.
Claims priority of application No. 111122949 (TW), filed on Jun. 21, 2022.
Prior Publication US 2023/0411343 A1, Dec. 21, 2023
Int. Cl. H01L 21/00 (2006.01); H01L 21/02 (2006.01); H01L 23/00 (2006.01)
CPC H01L 24/80 (2013.01) [H01L 21/02337 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A manufacturing method of a semiconductor structure, comprising:
forming a first dielectric layer on a first substrate;
forming a second dielectric layer on a second substrate;
performing a first heat treatment on the first dielectric layer and the second dielectric layer, wherein a temperature of the first heat treatment is between 300° C. and 400° C.;
forming a first conductive via in the first dielectric layer;
forming a second conductive via in the second dielectric layer; and
bonding the first substrate and the second substrate in a manner that the first dielectric layer faces the second dielectric layer, so as to connect the first conductive via and the second conductive via,
wherein the first heat treatment is performed after forming the first dielectric layer and the second dielectric layer and before forming the first conductive via and the second conductive via.