US 12,278,205 B2
Semiconductor device package with improved die pad and solder mask design
Jaimal Mallory Williamson, McKinney, TX (US); and Guangxu Li, Allen, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on Jan. 31, 2020, as Appl. No. 16/778,250.
Claims priority of provisional application 62/799,883, filed on Feb. 1, 2019.
Prior Publication US 2020/0251436 A1, Aug. 6, 2020
Int. Cl. H01L 23/48 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01)
CPC H01L 24/16 (2013.01) [H01L 21/481 (2013.01); H01L 24/81 (2013.01); H01L 21/563 (2013.01); H01L 23/49816 (2013.01); H01L 2224/10175 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/81815 (2013.01)] 25 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a package substrate having a die mount surface;
an array of die pads arranged in rows and columns in a first region of the die mount surface, wherein the array of die pads includes:
a first column of die pads defining and being coextensive with a first boundary of the array;
a second column of die pads defining and being coextensive with a second boundary of the array opposite the first boundary;
a first row of die pads defining and being coextensive with a third boundary of the array perpendicular to the first boundary; and
a second row of die pads defining and being coextensive with a fourth boundary of the array opposite the third boundary, wherein the first, second, third, and fourth boundaries define the first region, and wherein a second region of the die mount surface outside the first, second, third and fourth boundaries is exclusive of die pads;
a solder mask layer overlaying the die mount surface; and
openings extended through the solder mask layer, wherein the openings include:
a plurality of solder mask defined (SMD) openings at a plurality of die pad locations corresponding to a plurality of die pads of the array, each of the SMD openings exposing a portion of a surface of a corresponding die pad, the surface facing away from the package substrate; and
a first column of non-solder mask defined (NSMD) openings at die pad locations, each one of the die pads of the first column of die pads respectively aligning with a corresponding one of the NSMD openings of the first column of NSMD openings, each of the NSMD openings exposing an entire surface of a corresponding die pad and sidewalls of the die pad.