US 12,278,199 B2
Conductive bump of a semiconductor device and fabricating method thereof cross reference to related applications
Chang-Pin Huang, Taoyuan (TW); Tung-Liang Shao, Hsinchu (TW); Hsien-Ming Tu, Hsinchu County (TW); Ching-Jung Yang, Taoyuan (TW); and Yu-Chia Lai, Miaoli County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Oct. 27, 2023, as Appl. No. 18/495,789.
Application 18/495,789 is a continuation of application No. 17/224,946, filed on Apr. 7, 2021, granted, now 11,837,562.
Application 17/224,946 is a continuation of application No. 16/229,412, filed on Dec. 21, 2018, granted, now 10,985,121, issued on Apr. 20, 2021.
Application 16/229,412 is a continuation of application No. 14/082,849, filed on Nov. 18, 2013, granted, now 10,163,828, issued on Dec. 25, 2018.
Prior Publication US 2024/0055377 A1, Feb. 15, 2024
Int. Cl. H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01)
CPC H01L 24/05 (2013.01) [H01L 24/04 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/73 (2013.01); H01L 21/563 (2013.01); H01L 23/3114 (2013.01); H01L 23/3157 (2013.01); H01L 24/03 (2013.01); H01L 24/06 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/03452 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/0348 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05009 (2013.01); H01L 2224/05022 (2013.01); H01L 2224/05111 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05139 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05555 (2013.01); H01L 2224/05559 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/0558 (2013.01); H01L 2224/05611 (2013.01); H01L 2224/05616 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/06051 (2013.01); H01L 2224/0615 (2013.01); H01L 2224/06154 (2013.01); H01L 2224/10126 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/1134 (2013.01); H01L 2224/1191 (2013.01); H01L 2224/13021 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13113 (2013.01); H01L 2224/13118 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/73203 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/3512 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
a conductive layer in the substrate;
a conductive bump over the substrate and electrically coupled to the conductive layer, the conductive bump having a top surface facing away from the substrate; and
a dielectric stack, including:
a polymer layer laterally surrounding the conductive bump and including a portion spaced from a nearest outer edge of the conductive bump with a gap, wherein a first thickness of the polymer layer in a first region is greater than a second thickness of the polymer layer in a second region adjacent to the first region; and
a dielectric layer underneath the polymer layer, wherein
the dielectric layer surrounds the conductive layer and at least a portion of the conductive bump, and
the dielectric stack has a non-uniform top surface and includes:
a first top surface at a bottom of the gap and proximal to the conductive bump; and
a second top surface above the first top surface and distal to the conductive bump, wherein
the top surface of the conductive bump, in its entirety, is at a height level between a height level of the first top surface and a height level of the second top surface of the dielectric stack, and
the dielectric layer is in direct contact with a sidewall of the conductive bump.