US 12,278,198 B2
Semiconductor device on wiring board having reference potential planes with openings
Yoshikazu Tanaka, Tokyo (JP); Tadashi Kameyama, Tokyo (JP); and Takafumi Betsui, Tokyo (JP)
Assigned to RENESAS ELECTRONICS CORPORATION, Tokyo (JP)
Filed by RENESAS ELECTRONICS CORPORATION, Tokyo (JP)
Filed on May 12, 2022, as Appl. No. 17/743,033.
Prior Publication US 2023/0369257 A1, Nov. 16, 2023
Int. Cl. H01L 23/66 (2006.01); H01P 3/08 (2006.01)
CPC H01L 23/66 (2013.01) [H01P 3/081 (2013.01); H01L 2223/6627 (2013.01); H01L 2223/6638 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor package having a differential signal terminal pair; and
a wiring board on which the semiconductor package is mounted,
wherein the wiring board comprises:
a first and a second signal transmission line formed in a first conductive layer and electrically connected to the differential signal terminal pair; and
a first reference potential plane having a first conductive pattern which is formed in a second conductive layer adjacent to the first conductive layer and which includes a first region overlapped with the first signal transmission line in plan view and a second region overlapped with the second signal transmission line in plan view,
wherein the first conductive pattern has a plurality of first openings in the first and the second region,
wherein the first and the second signal transmission line is arranged such that an area of a first conductive potion of the reference potential plane in the first region becomes equal to an area of a second conductive potion of the reference potential plane in the second region,
wherein the semiconductor device further comprises:
a second reference potential plane having a second conductive pattern which is formed in a third conductive layer adjacent to the second conductive layer across the first conductive layer and which includes a third region overlapped with the first signal transmission line in plan view and a fourth region overlapped with the second signal transmission line in plan view, and
wherein the second conductive pattern includes a plurality of second openings.