CPC H01L 23/562 (2013.01) [H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/565 (2013.01); H01L 23/16 (2013.01); H01L 23/3128 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 23/552 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/3025 (2013.01); H01L 2924/3512 (2013.01)] | 20 Claims |
1. A method of manufacturing a semiconductor device, comprising:
providing a substrate comprising:
a first side;
a second side opposite to the first side;
a conductive structure comprising a substrate inward terminal at the first side and a substrate outward terminal at the second side, and
a dielectric structure comprising a first dielectric comprising a first opening at the second side;
wherein:
the substrate outward terminal comprises:
a multi-stage terminal comprising:
a pad base within the first opening comprising a pad base top side recessed below an upper surface the first dielectric and a pad base bottom side opposite the pad base top side;
a pad head coupled to the pad base within the first opening, the pad head comprising a pad head top side and a pad head bottom side that is coupled to the pad base top side within the first opening;
the pad head top side external to the first opening; and
the pad base and the pad head are separate and distinct structures;
providing a semiconductor component at the first side of the substrate and electrically coupled to the substrate inward terminal; and
providing an encapsulant encapsulating the semiconductor component.
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