US 12,278,193 B2
Semiconductor devices including recognition marks
Hyun Chul Seo, Icheon-si Gyeonggi-do (KR)
Assigned to SK hynix Inc., Icheon-si Gyeonggi-do (KR)
Filed by SK hynix Inc., Icheon-si Gyeonggi-do (KR)
Filed on Nov. 9, 2021, as Appl. No. 17/522,602.
Claims priority of application No. 10-2021-0085111 (KR), filed on Jun. 29, 2021.
Prior Publication US 2022/0415821 A1, Dec. 29, 2022
Int. Cl. H05K 1/02 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 23/544 (2006.01)
CPC H01L 23/544 (2013.01) [H01L 24/02 (2013.01); H01L 24/05 (2013.01); H01L 24/48 (2013.01); H01L 24/85 (2013.01); H01L 2223/54426 (2013.01); H01L 2223/54473 (2013.01); H01L 2224/0235 (2013.01); H01L 2224/0236 (2013.01); H01L 2224/02373 (2013.01); H01L 2224/02375 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/48463 (2013.01); H01L 2224/8513 (2013.01); H01L 2224/85181 (2013.01)] 27 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first redistribution layer pattern formed on a semiconductor substrate;
a second redistribution layer pattern, with a bonding pad portion, disposed on the first redistribution layer pattern; and
a recognition mark formed on the first redistribution layer pattern to indicate a position of the bonding pad portion,
wherein the recognition mark is spaced apart from the bonding pad portion.