US 12,278,182 B2
Vertical semiconductor device
Changyeon Yu, Hwaseong-si (KR); Pansuk Kwak, Goyang-si (KR); and Daeseok Byeon, Seongnam-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Apr. 15, 2022, as Appl. No. 17/721,481.
Claims priority of application No. 10-2021-0077261 (KR), filed on Jun. 15, 2021.
Prior Publication US 2022/0399273 A1, Dec. 15, 2022
Int. Cl. H01L 23/528 (2006.01); G11C 16/08 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/40 (2023.01); H10B 41/50 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/40 (2023.01); H10B 43/50 (2023.01)
CPC H01L 23/5283 (2013.01) [G11C 16/08 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/40 (2023.02); H10B 41/50 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/40 (2023.02); H10B 43/50 (2023.02)] 19 Claims
OG exemplary drawing
 
10. A vertical semiconductor device, comprising:
a first conductive line structure on a substrate, the first conductive line structure including first conductive lines and first insulation layers being alternately and repeatedly stacked in a vertical direction perpendicular to an upper surface of the substrate, the first conductive line structure elongating in a first direction, the first direction being parallel to the upper surface of the substrate, each of the first conductive lines including a first end and a second end opposite to the first end;
a second conductive line structure on the substrate, the second conductive line structure including second conductive lines and second insulation layers being alternately and repeatedly stacked in the vertical direction, the second conductive line structure elongating in the first direction, each of the second conductive lines including a third end and a fourth end opposite to the third end;
a first address decoder connected to the first end and configured to apply electrical signals; and
a second address decoder connected to the third end and configured to apply electrical signals,
wherein the first conductive line structure and the second conductive line structure alternate in a second direction, the second direction being parallel to the upper surface of the substrate and being perpendicular to the first direction, and the first conductive line structure and the second conductive line structure being separated by an opening interposed therebetween and extending in the first direction,
wherein, in a plan view, a first width in a first portion adjacent to the first end is greater than a second width in a second portion adjacent to the second end in each of the first conductive lines,
wherein, in the plan view, a third width in a third portion adjacent to the third end is greater than a fourth width in a fourth portion adjacent to the fourth end in each of the second conductive lines, and
wherein the third end is adjacent to the second end in the second direction.