| CPC H01L 23/5283 (2013.01) [G06F 30/392 (2020.01); G06F 30/394 (2020.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01); H01L 23/5286 (2013.01)] | 18 Claims |
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1. An integrated circuit comprising:
a first conductive layer comprising conductive patterns on first tracks extending parallel to each other in a first lateral direction, the conductive patterns on the first tracks comprising a first conductive pattern and primary conductive patterns;
a second conductive layer comprising conductive patterns on second tracks extending parallel to each other in a second lateral direction orthogonal to the first lateral direction, the conductive patterns on the second tracks comprising a second conductive pattern and a third conductive pattern; and
a first via array comprising a first via and a second via, wherein the first via is connected to a top surface of the first conductive pattern and a bottom surface of the second conductive pattern, and wherein the second via is connected to the top surface of the first conductive pattern and a bottom surface of the third conductive pattern,
wherein each of the first conductive pattern, the first via, and the second via has a width in the second lateral direction that is greater than a width of the primary conductive patterns on the first tracks of the first conductive layer in the second lateral direction, and
wherein a center of the first conductive pattern is aligned with a central line between two adjacent first tracks of the first tracks of the first conductive layer and the width of the first conductive pattern satisfies equation (2nP−M−2S<W≤(2n+1)P−M−2S), or the center of the first conductive pattern is aligned with one of the first tracks of the first conductive layer and the width of the first conductive pattern satisfies equation ((2n+1)P M−2S<W≤(2n+2)P−M−2S),
wherein M and P respectively represent the width of the primary conductive patterns and a pitch of the first tracks of the first conductive layer, S represents a shortest distance between the conductive patterns of the first conductive layer, W represents the width of the first conductive pattern in the second lateral direction, and n is a positive integer.
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