US 12,278,172 B2
Substrate frame design for three-dimensional stacked electronic assemblies and method for the same
Akash Agrawal, San Jose, CA (US); and Prashanth Ganeshbaabu, Bengaluru (IN)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Jun. 28, 2022, as Appl. No. 17/851,754.
Prior Publication US 2023/0420351 A1, Dec. 28, 2023
Int. Cl. H01L 23/498 (2006.01); G06F 30/398 (2020.01); H05K 1/18 (2006.01); H05K 3/30 (2006.01); G06F 115/12 (2020.01); H01L 25/00 (2006.01); H01L 25/10 (2006.01)
CPC H01L 23/49833 (2013.01) [G06F 30/398 (2020.01); H05K 1/181 (2013.01); H05K 3/301 (2013.01); G06F 2115/12 (2020.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H05K 2201/10378 (2013.01); H05K 2201/10515 (2013.01); H05K 2201/10522 (2013.01); H05K 2201/1053 (2013.01); H05K 2201/2018 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A three-dimensional (3D) stacked electronic assembly comprising:
a printed circuit board;
a package substrate comprising a first side and a second side;
a first plurality of integrated circuit (IC) packages that are mounted to the first side of the package substrate;
a second plurality of IC packages that are mounted to the second side of the package substrate, wherein the second plurality of IC packages comprises a different number or arrangement of IC packages than the first plurality of IC packages, thereby causing warpage locations in the package substrate; and
a substrate frame disposed between the printed circuit board and the first side of the package substrate in the 3D stacked electronic assembly, wherein:
the substrate frame defines a cavity inside of the substrate frame and between the printed circuit board and the package substrate;
the first plurality of IC packages are mounted to the first side of the package substrate inside of the cavity;
the second plurality of IC packages are mounted to the second side of the package substrate within a footprint of the cavity;
the substrate frame is divided into a plurality of frame sections that are separated by spaces between the plurality of frame sections; and
the spaces between the plurality of frame sections of the substrate frame are located next to the warpage locations in the package substrate to reduce warpage.