	US 12,278,171 B2
	Chip package and method of forming a chip package
Chan Lam Cha, Jasin (MY); Wern Ken Daryl Wee, Melaka (MY); Hoe Jian Chong, Melaka (MY); and Chin Kee Leow, Melaka (MY)
Assigned to Infineon Technologies AG, Neubiberg (DE)
Filed by Infineon Technologies AG, Neubiberg (DE)
Filed on Dec. 20, 2022, as Appl. No. 18/084,604.
Application 18/084,604 is a continuation in part of application No. 17/556,341, filed on Dec. 20, 2021.
Claims priority of application No. 102022103210.8 (DE), filed on Feb. 11, 2022.
Prior Publication US 2023/0197586 A1, Jun. 22, 2023
Int. Cl. H01L 23/495 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)

CPC H01L 23/49575 (2013.01) [H01L 21/56 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01); H01L 2224/211 (2013.01)]

17 Claims

1. A method of forming a chip package, comprising:

forming a contact structure by attaching at least one continuous longitudinally extended electrically conductive element to a contact pad of a chip in at least three contact positions, wherein the conductive element bends away from the contact pad between pairs of consecutive contact positions; and

partially encapsulating the contact structure, wherein the contact structure is partially exposed at an outer surface of the encapsulation; and

arranging an electrically conductive material on the outer surface in contact with the exposed contact structure;

wherein the electrically conductive material is

a plurality of individual electrically conductive structures that are each formed on the outer surface and in contact with the exposed contact structure at one location.