US 12,278,169 B2
Electronic device packaging with galvanic isolation
Maria Cristina Estacio, Lapulapu (PH); Marlon Bartolo, Lapu Lapu (PH); Maria Clemens Ypil Quinones, Cebu (PH); and Chung-Lin Wu, San Jose, CA (US)
Assigned to SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Scottsdale, AZ (US)
Filed by SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US)
Filed on Mar. 4, 2021, as Appl. No. 17/249,529.
Application 17/249,529 is a division of application No. 16/102,922, filed on Aug. 14, 2018, granted, now 10,943,855.
Claims priority of provisional application 62/549,122, filed on Aug. 23, 2017.
Prior Publication US 2021/0193561 A1, Jun. 24, 2021
Int. Cl. H01L 23/49 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 23/495 (2006.01); H01L 23/538 (2006.01)
CPC H01L 23/49541 (2013.01) [H01L 23/48 (2013.01); H01L 23/49531 (2013.01); H01L 23/49575 (2013.01); H01L 24/48 (2013.01); H01L 23/538 (2013.01); H01L 23/5384 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/85207 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/13091 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic device assembly comprising:
a dielectric substrate having a first surface and a second surface opposite the first surface, the dielectric substrate including:
a first unidirectional isolation channel defined thereon, the first unidirectional isolation channel having an input terminal and an output terminal; and
a second unidirectional isolation channel defined thereon, the second unidirectional isolation channel having an input terminal and an output terminal;
a leadframe including:
a first leadframe portion including a first plurality of signal leads, a first corner of the first surface of the dielectric substrate being disposed on and coupled with a first signal lead of the first plurality of signal leads, and a second corner of the first surface of the dielectric substrate being disposed on and coupled with a second signal lead of the first plurality of signal leads; and
a second leadframe portion including a second plurality of signal leads, a third corner of the first surface of the dielectric substrate being disposed on and coupled with a first signal lead of the second plurality of signal leads, and a fourth corner of the first surface of the dielectric substrate being disposed on and coupled with a second signal lead of the second plurality of signal leads; and
a semiconductor die disposed on and coupled with at least one of:
the first signal lead of the first plurality of signal leads; or
the second signal lead of the first plurality of signal leads,
the semiconductor die being electrically coupled, using respective wire bonds, with at least one signal lead of the first plurality of signal leads, the input terminal of the first unidirectional isolation channel, and the output terminal of the second unidirectional isolation channel.