US 12,278,156 B2
Semiconductor package
Chin-Hua Wang, New Taipei (TW); Po-Yao Lin, Zhudong Township (TW); Feng-Cheng Hsu, New Taipei (TW); Shin-Puu Jeng, Hsinchu (TW); Wen-Yi Lin, New Taipei (TW); and Shu-Shen Yeh, Taoyuan (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Nov. 29, 2023, as Appl. No. 18/522,601.
Application 17/320,981 is a division of application No. 16/275,518, filed on Feb. 14, 2019, granted, now 11,011,447, issued on May 18, 2021.
Application 18/522,601 is a continuation of application No. 17/320,981, filed on May 14, 2021, granted, now 11,862,528.
Claims priority of provisional application 62/718,545, filed on Aug. 14, 2018.
Prior Publication US 2024/0096731 A1, Mar. 21, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/373 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/433 (2006.01); H01L 25/065 (2023.01); H01L 25/10 (2006.01)
CPC H01L 23/367 (2013.01) [H01L 21/4882 (2013.01); H01L 21/563 (2013.01); H01L 23/3128 (2013.01); H01L 23/3736 (2013.01); H01L 23/433 (2013.01); H01L 25/0655 (2013.01); H01L 25/105 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a first chip disposed over a first package substrate;
an underfill material disposed between the first chip and the first package substrate;
a molding compound surrounding the first chip;
a first thermal interface material disposed over the first chip and the molding compound, wherein a width of the first thermal interface material is greater than a width of the underfill material; and
a heat spreader disposed over the thermal interface material.