US 12,278,155 B2
Integrated circuit package with heat sink and manufacturing method thereof
Younes Boutaleb, Grenoble (FR); Fabien Quercia, Isere (FR); Asma Hajji, Voiron (FR); and Ouafa Hajji, Voiron (FR)
Assigned to STMicroelectronics (Grenoble 2) SAS, Grenoble (FR)
Filed by STMicroelectronics (Grenoble 2) SAS, Grenoble (FR)
Filed on Nov. 10, 2021, as Appl. No. 17/523,386.
Claims priority of application No. 2011744 (FR), filed on Nov. 17, 2020.
Prior Publication US 2022/0157683 A1, May 19, 2022
Int. Cl. H01L 23/31 (2006.01); H01L 23/00 (2006.01)
CPC H01L 23/3142 (2013.01) [H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An integrated circuit package, comprising:
a support substrate supporting an electronic chip;
an encapsulation coating located on the support substrate and coating said electronic chip;
wherein the encapsulation coating includes a first trench that is continuous and surrounds said electronic chip and a second trench spaced apart from the first trench, and wherein the first trench is positioned between the second trench and the electronic chip;
a heat sink located above said electronic chip and above at least part of said encapsulation coating and fixed to said encapsulation coating by an adhesive material contained at least partially within said second trench; and
a layer of thermal interface material located between the electronic chip and the heat sink.