US 12,278,144 B2
Gate contact structure over active gate and method to fabricate same
Abhijit Jayant Pethe, Hillsboro, OR (US); Tahir Ghani, Portland, OR (US); Mark Bohr, Aloha, OR (US); Clair Webb, Aloha, OR (US); Harry Gomez, Hillsboro, OR (US); and Annalisa Cappellani, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Mar. 24, 2021, as Appl. No. 17/211,757.
Application 17/211,757 is a continuation of application No. 16/219,795, filed on Dec. 13, 2018, granted, now 11,004,739.
Application 16/219,795 is a continuation of application No. 15/266,819, filed on Sep. 15, 2016, granted, now 10,192,783, issued on Jan. 29, 2019.
Application 15/266,819 is a continuation of application No. 13/622,974, filed on Sep. 19, 2012, granted, now 9,461,143, issued on Oct. 4, 2016.
Prior Publication US 2021/0210385 A1, Jul. 8, 2021
Int. Cl. H01L 21/768 (2006.01); H01L 21/28 (2006.01); H01L 21/311 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 21/76897 (2013.01) [H01L 21/28008 (2013.01); H01L 21/31111 (2013.01); H01L 21/76807 (2013.01); H01L 21/76895 (2013.01); H01L 23/5226 (2013.01); H01L 23/53257 (2013.01); H01L 29/66545 (2013.01); H01L 29/66583 (2013.01); H01L 29/785 (2013.01); H01L 21/76834 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit structure, comprising:
a fin comprising silicon;
a gate structure over the fin, the gate structure comprising a gate electrode;
a trench contact structure over the fin, wherein the trench contact structure comprises a trench cap dielectric layer directly on a top of a trench contact, the trench cap dielectric layer having a top surface above a bottom surface, and the trench cap dielectric layer having a side surface between the top surface and the bottom surface;
a gate contact via directly on a portion of the gate electrode vertically over the fin, wherein the gate contact via is further directly on and in contact with the top surface of the trench cap dielectric layer of the trench contact structure, and wherein the gate contact via is continuous from a location vertically over the gate electrode to a location vertically over the trench contact; and
a dielectric spacer between the gate structure and the trench contact structure, wherein the dielectric spacer has a top at a same horizontal level as the top surface of the trench cap dielectric layer of the trench contact structure.