	US 12,278,114 B2
	Manufacturing method of semiconductor structure
Qiang Wan, Hefei (CN); Jun Xia, Hefei (CN); Kangshu Zhan, Hefei (CN); Sen Li, Hefei (CN); Penghui Xu, Hefei (CN); and Tao Liu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Jan. 21, 2022, as Appl. No. 17/648,582.
Application 17/648,582 is a continuation of application No. PCT/CN2021/120321, filed on Sep. 24, 2021.
Claims priority of application No. 202110320475.9 (CN), filed on Mar. 25, 2021.
Prior Publication US 2022/0310402 A1, Sep. 29, 2022
Int. Cl. H01L 21/311 (2006.01); H01L 21/02 (2006.01)

CPC H01L 21/31111 (2013.01) [H01L 21/0214 (2013.01); H01L 21/02164 (2013.01); H01L 21/0228 (2013.01); H01L 21/31144 (2013.01)]

18 Claims

1. A manufacturing method of a semiconductor structure, comprising:

providing a substrate;

forming an insulating layer on the substrate, wherein the insulating layer comprises a first dielectric layer and a second dielectric layer, the insulating layer comprises a first trench, and the second dielectric layer covers an upper surface of the first dielectric layer; at least one side surface of the second dielectric layer is a curved surface;

forming a protective layer, wherein the protective layer covers an upper surface of the second dielectric layer and a bottom and sidewalls of the first trench, the curved surface of the second dielectric layer helps improve the effective adhesion rate of the material of the protective layer;

forming a second sacrificial layer, wherein the second sacrificial layer covers a surface of the protective layer and fills the first trench;

etching part of the protective layer, part of the second dielectric layer and part of the second dielectric layer by using a dry etching process, wherein an upper surface of the remaining protective layer is flush with an upper surface of the remaining second dielectric layer, an upper surface of the remaining second sacrificial layer is lower than the upper surface of the remaining protective layer, and the protective layer exposes the upper surface of the second dielectric layer;

removing part of the protective layer to expose at least part of a surface of the second dielectric layer;

removing the second dielectric layer by using a first wet etching process, wherein the first wet etching process has a first etch selectivity of a material of the second dielectric layer to a material of the first dielectric layer; and

removing the protective layer by using a second wet etching process, wherein the second wet etching process has a second etch selectivity of a material of the protective layer to the material of the first dielectric layer, and the second etch selectivity is greater than the first etch selectivity.