US 12,278,110 B2
Bias voltage modulation approach for SiO/SiN layer alternating etch process
Sean Kang, Santa Clara, CA (US); Olivier Luere, Sunnyvale, CA (US); Kenji Takeshita, Santa Clara, CA (US); Sanghyuk Choi, Palo Alto, CA (US); Mengnan Zou, Sunnyvale, CA (US); and Zihao Ding, Fremond, CA (US)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Jan. 10, 2022, as Appl. No. 17/572,397.
Prior Publication US 2023/0223268 A1, Jul. 13, 2023
Int. Cl. H01L 21/3065 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01)
CPC H01L 21/3065 (2013.01) [H01L 21/02126 (2013.01); H01L 21/31116 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A method for etching a film stack having stacked pairs of oxide and nitride layers, the method comprising:
transferring a substrate having a film stack formed thereon into a processing chamber;
providing a first bias voltage to the substrate;
etching an oxide layer of the film stack with a first process gas recipe while providing the first bias voltage to the substrate;
providing a second bias voltage to the substrate, the second bias voltage greater than the first bias voltage; and
etching a nitride layer of the film stack with the first process gas recipe while providing the second bias voltage to the substrate.