US 12,278,107 B2
Semiconductor structure and method for forming semiconductor structure
Kai Cao, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Feb. 21, 2022, as Appl. No. 17/676,293.
Application 17/676,293 is a continuation of application No. PCT/CN2021/120121, filed on Sep. 24, 2021.
Claims priority of application No. 202110289168.9 (CN), filed on Mar. 18, 2021.
Prior Publication US 2022/0301871 A1, Sep. 22, 2022
Int. Cl. H01L 21/033 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01)
CPC H01L 21/0332 (2013.01) [H01L 21/0337 (2013.01); H01L 21/31144 (2013.01); H01L 21/76811 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
providing a base;
forming a first dielectric layer on the base;
forming a plurality of first mask patterns each having zigzag shape on the first dielectric layer, wherein the first mask patterns extend in a first direction;
forming a plurality of second mask patterns each having zigzag shape on the first mask patterns, wherein the second mask patterns extend in a second direction different from the first direction, wherein an angle between the first direction and the second direction is 60° or 120°, and projections of the first mask patterns on the first dielectric layer and projections of the second mask patterns on the first dielectric layer overlap with each other to form a plurality of regular hexagons; and
etching the first dielectric layer by using the second mask patterns and the first mask patterns as masks to form openings.