US 12,277,979 B2
NAND data placement schema
Carminantonio Manganelli, Benevento (IT); Paolo Papa, Naples (IT); Massimo Iaculo, San Marco Evangelista (IT); Giuseppe D'Eliseo, Caserta (IT); and Alberto Sassara, Naples (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 4, 2023, as Appl. No. 18/527,978.
Application 18/527,978 is a continuation of application No. 18/075,027, filed on Dec. 5, 2022, granted, now 11,955,189.
Application 18/075,027 is a continuation of application No. 16/488,681, granted, now 11,521,690, previously published as PCT/US2019/022587, filed on Mar. 15, 2019.
Claims priority of provisional application 62/675,451, filed on May 23, 2018.
Claims priority of provisional application 62/644,248, filed on Mar. 16, 2018.
Prior Publication US 2024/0112745 A1, Apr. 4, 2024
Int. Cl. G11C 16/34 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 29/42 (2006.01); H03K 19/02 (2006.01); H03K 19/21 (2006.01)
CPC G11C 16/3459 (2013.01) [G11C 16/102 (2013.01); G11C 16/26 (2013.01); G11C 29/42 (2013.01); H03K 19/02 (2013.01); H03K 19/21 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory controller device comprising:
a hardware processor configured to perform operations comprising:
receiving a data item from a host over a host interface;
programming a first portion of the received data item into an array of NAND memory cells organized into multiple planes and multiple pages at a first page of the multiple pages and at a first plane of the multiple planes;
programming a second portion of the received data item into the array at a second page of the multiple pages and at a second plane of the multiple planes, the second page being assigned a page line number greater than a page line number of the first page;
programming a third portion of the received data item into the array at a third page of the multiple pages and at a third plane of the multiple planes, the third page being assigned a page line number greater than the page line number of the second page; and
programming a fourth portion of the received data item into the array at a fourth page of the multiple pages and at a fourth plane of the multiple planes, the fourth page being assigned a page line number greater than the page line number assigned to the third page; and
wherein each data portion of the received data item is programmed on a different page line than every other data portion.