| CPC G09G 3/3275 (2013.01) [G09G 3/3266 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/131 (2023.02); G09G 2300/0842 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2330/045 (2013.01)] | 18 Claims |

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1. A display substrate, comprising: a base substrate and a signal line film layer arranged on the base substrate; wherein the signal line film layer includes:
a first conductive layer and a second conductive layer that are stacked; and,
a conductive connection layer, wherein the conductive connection layer is arranged at a different layer from each of the first conductive layer and the second conductive layer, and an orthographic projection of the conductive connection layer on the base substrate at least partially overlaps an orthographic projection of the first conductive layer on the base substrate, and the orthographic projection of the conductive connection layer on the base substrate at least partially overlaps an orthographic projection of the second conductive layer on the base substrate, the conductive connection layer is respectively coupled to the first conductive layer and the second conductive connection layer;
wherein the conductive connection pattern includes a main portion and a second extension portion extending from the main portion, the main portion includes at least a portion extending along the second direction, the second extending portion includes at least a portion extending along the first direction, the first direction intersects the second direction;
the display substrate further includes a plurality of sub-pixels, the sub-pixels include a sub-pixel driving circuit, the sub-pixel driving circuit includes a driving transistor and a fifth transistor, and a first electrode of the fifth transistor is coupled to a corresponding second extension portion, and a second electrode of the fifth transistor is coupled to a first electrode of the driving transistor.
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