CPC G09G 3/3258 (2013.01) [G09G 2310/0291 (2013.01); G09G 2320/0223 (2013.01); G09G 2320/0233 (2013.01)] | 13 Claims |
1. A display apparatus comprising:
a display panel where one pixel line including a plurality of pixels are provided in plurality;
a gate driver configured to apply a gate signal to the one pixel line; and
a source driver configured to apply a data signal to the one pixel line,
wherein the source driver comprises:
a plurality of amplifier circuits corresponding to a plurality of source output channels, respectively;
a plurality of output switches electrically connected between the plurality of amplifier circuits and the plurality of source output channels, respectively; and
a source output control circuit configured to apply sequentially delayed source output enable signals to the plurality of output switches to delay an output timing of the data signal by units of source output channels, based on a degree of delay of the gate signal.
|