US 12,277,907 B2
Pixel driving circuit and display panel
Jiangnan Lu, Beijing (CN); Libin Liu, Beijing (CN); Zhenzhen Shan, Beijing (CN); and Shiming Shi, Beijing (CN)
Assigned to BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 18/274,958
Filed by BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Jul. 1, 2022, PCT No. PCT/CN2022/103403
§ 371(c)(1), (2) Date Jul. 28, 2023,
PCT Pub. No. WO2023/016138, PCT Pub. Date Feb. 16, 2023.
Claims priority of application No. 202110898500.1 (CN), filed on Aug. 5, 2021.
Prior Publication US 2024/0144884 A1, May 2, 2024
Int. Cl. G09G 3/32 (2016.01); G09G 3/3225 (2016.01); G09G 3/3258 (2016.01); H10K 59/121 (2023.01)
CPC G09G 3/3258 (2013.01) [G09G 3/3225 (2013.01); H10K 59/1213 (2023.02); G09G 2300/0452 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/062 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01); G09G 2320/045 (2013.01); G09G 2330/021 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A pixel driving circuit, comprising: a data writing sub-circuit, the threshold compensation sub-circuit, a driving sub-circuit, the storage sub-circuit, a first reset sub-circuit and a second reset sub-circuit; wherein a connection node between the driving sub-circuit and a second terminal of the storage sub-circuit is a first node; a connection node between the data writing sub-circuit and a first terminal of the storage sub-circuit is a second node; a connection node between the driving sub-circuit and the threshold compensation sub-circuit is a third node;
the first reset sub-circuit comprises a first transistor, a control electrode of the first transistor is connected with a first reset signal line, a first electrode of the first transistor is connected with a first initialization signal line, and a second electrode of the first transistor is connected with the first node;
the second reset sub-circuit is configured to reset a potential of the second node by a reference voltage under control of a second reset signal;
the data writing sub-circuit is configured to transmit, in response to a first scan signal, a data voltage to the second node to store the data voltage in the storage sub-circuit;
the threshold compensation sub-circuit comprises a second transistor, a first electrode of the second transistor is connected with the first node, a second electrode of the second transistor is connected with the second node, and a control electrode of the second transistor is connected with a second scan line;
the driving sub-circuit is configured to provide a driving current for a light emitting device to be driven according to potentials of the first node and the third node;
the storage sub-circuit is configured to store the data voltage; wherein,
at least one of the first transistor or the second transistor comprises an oxide thin film transistor,
the pixel driving circuit further comprises: a first light emission control sub-circuit and a second light emission control sub-circuit, wherein
the first light emission control sub-circuit is configured to transmit the driving current generated by the driving sub-circuit to the light emitting device to be driven under control of a first light emission control signal; and
the second light emission control sub-circuit is configured to transmit the reference voltage to the second node under control of a second light emission control signal, wherein
the first light emission control sub-circuit comprises a sixth transistor, and the second light emission control sub-circuit comprises a seventh transistor;
a first electrode of the sixth transistor is connected with the third node, a second electrode of the sixth transistor is connected with the light emitting device to be driven, and a control electrode of the sixth transistor is connected with a first light emission control line; and
a first electrode of the seventh transistor is connected with a reference voltage line, a second electrode of the seventh transistor is connected with the second node, and a control electrode of the seventh transistor is connected with a second light emission control line.