US 12,277,882 B1
Gate driving circuit for generating signals of controlling subpixels of display panel, and display panel
Xiang Zhou, Guangdong (CN); Baixiang Han, Guangdong (CN); and Guangyao Li, Guangdong (CN)
Assigned to SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Shenzhen (CN)
Filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Guangdong (CN)
Filed on Dec. 31, 2023, as Appl. No. 18/401,563.
Int. Cl. G09G 3/20 (2006.01)
CPC G09G 3/20 (2013.01) [G09G 2310/0267 (2013.01); G09G 2310/0286 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A gate driving circuit, applied to a display panel that comprises a plurality of subpixels, the gate driving circuit comprising a plurality of gate driving units, each of the plurality of gate driving units comprising:
a node voltage control module, comprising:
a first module, configured to output a first voltage signal at a first node in response to a pull-down control signal at a first control port of the first module;
a storage module, comprising a first port receiving the first voltage signal that is constant, and a second terminal electrically connected to the first node; and
a second module, comprising a second input port to receive a second voltage signal and a second control port to receive a pull-up control signal;
a pull-down module, electrically connected to the node voltage control module at the first node, and configured to, in response to the first voltage signal, output a first working signal for controlling a plurality of sub-pixels to turn off at an output port of the gate driving unit;
an inverter, electrically connected to the node voltage control module through the first node, configured to output a third voltage signal to a second node; and
a pull-up module, electrically connected to the inverter through the second node, configured to control the gate driving unit outputting the second working signal for controlling the plurality of subpixels to turn on in response to a third voltage signal;
wherein the storage module is configured to maintain the first voltage signal applied on the first node to maintain the first working signal at the output port of the gate driving unit controlled by the pull-down module,
wherein the second module is configured to output the second voltage signal to the first node in response to the pull-up control signal,
wherein the pull-down module is configured to control the gate driving unit outputting a second working signal for controlling the plurality of subpixels to turn on in response to the second voltage signal,
wherein the inverter comprises:
a first inverting transistor, comprising a gate electrically connected to the first node, a source fed with a fourth voltage signal, and a drain;
a second inverting transistor, comprising a gate fed with third voltage signal, a source fed with third voltage signal, and a drain electrically connected to the drain of the first inverting transistor; and
a third inverting transistor, comprising a gate electrically connected to the drain of the second inverting transistor, a source fed with the third voltage signal, and the gate of the third inverting transistor, and a drain electrically connected to the second node;
wherein the first inverting transistor is configured to turn on or turn off the third inverting transistor to control voltage applied on the second node in response to voltage applied on the first node.