| CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01)] | 18 Claims |
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1. A memory controller that is coupled with at least one memory apparatus having a plurality of pages, the memory controller being configured to:
receive a first command set having at least one read command;
enable a first read mode when the first command set meets a first preset condition, the first preset condition including that a number of read commands included in the first command set is 1 or a total length of logical addresses in the first command set is less than or equal to a first threshold value;
send demands corresponding to the first command set to the memory apparatus; and
output data corresponding to the logical addresses in the first command set among all data of a first page sent by the memory apparatus, the first page being a page, which corresponds to the logical addresses in the first command set, in the memory apparatus,
wherein the first command set comprises a plurality of read commands, and the memory controller further comprises a read buffer area that includes a first read buffer area and a control portion that is configured to:
in the first read mode, store all data of the first page sent by the memory apparatus in the first read buffer area,
acquire, from the first read buffer area, the data corresponding to the logical addresses in the first command set, and output the data, and
after the first command set meets a second preset condition, judge whether the first command set meets the first preset condition, the second preset condition including that the logical addresses of the plurality of read commands are continuous, and the number of the plurality of read commands is greater than a second threshold value.
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