US 12,277,339 B2
Semiconductor storage apparatus and semiconductor system for emulating erasing operation of flash memory
Kensaku Sugai, Kanagawa (JP)
Assigned to Winbond Electronics Corp., Taichung (TW)
Filed by Winbond Electronics Corp., Taichung (TW)
Filed on Jul. 11, 2022, as Appl. No. 17/861,257.
Claims priority of application No. 2021-140753 (JP), filed on Aug. 31, 2021.
Prior Publication US 2023/0069483 A1, Mar. 2, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0652 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A semiconductor storage apparatus, comprising:
a memory cell array;
a control component for reading or writing the memory cell array according to an input of a command;
a setting component for setting whether or not to receive an erasing command of a flash memory; and
an adjustment component for adjusting a busy time,
wherein when the setting component is set to be able to receive the erasing command, the control component responds to the input erasing command, emulates an erasing operation of the flash memory, and controls busy information according to the busy time adjusted by the adjustment component,
the adjustment component comprises at least one register capable of setting the busy time and is capable of being set by a user,
the at least one register comprises a first register for setting a fixed busy time, and a second register through which a user is capable of setting an arbitrary busy time, and
the control component controls the busy information according to a total busy time summed up by the busy time set in the first register and the busy time set in the second register.