US 12,277,333 B2
Computer-implemented method for optimizing the memory of a partitioned system
Simon Kramer, Leonberg (DE); Franck Youk, Stuttgart (DE); and Michael Abel, Ludwigsburg (DE)
Assigned to ROBERT BOSCH GMBH, Stuttgart (DE)
Filed by Robert Bosch GmbH, Stuttgart (DE)
Filed on Mar. 1, 2023, as Appl. No. 18/176,956.
Claims priority of application No. 10 2022 202 335.8 (DE), filed on Mar. 9, 2022.
Prior Publication US 2023/0289085 A1, Sep. 14, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0644 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0673 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A computer-implemented method for optimizing memory of a partitioned system which includes multiple memories, at least one processing core, and at least one memory protection unit, each memory protection unit including multiple registers, the method comprising the following steps:
calculating run-time changes of each respective piece of data of a multitude of data which are to be processed by the at least one processing core, with each respective piece of data being placed in a memory of the multiple memories based on access statistics for the respective piece of data, each respective piece of data of the multitude of data being assigned to a rights area or multiple rights areas;
determining a placement of the respective pieces of data in the memories based on the calculated run-time changes; and
allocating the multiple registers of the at least one memory protection unit for the determined placement of the respective data in the memories, each register of the multiple registers identifying a memory area of the multiple memories;
wherein the method includes at least one of the following two features (I)-(II):
(I) each of the run-time changes that is calculated is a degree of gain or loss in run-time usage of a respective one of the pieces of data by a respective placement of the respective piece of data in the memory compared to a reference run-time usage metric; and
(II) the method further comprises, when, during the allocation of the multiple registers of the at least one memory protection unit, more registers are required for the determined placement of the respective pieces of data in the multiple memories than are available in the at least one memory protection unit, combining those of the respective pieces of data which are (i) in different ones of the memories but (ii) in a same one of the rights areas, until a number of registers in the at least one memory protection unit is sufficient.