US 12,277,076 B2
Error correction for computational memory modules
Eliad Hillel, Herzliya (IL); Gal Dayan, Hod Hasharon (IL); and Elad Sity, Tel Aviv (IL)
Assigned to NeuroBlade Ltd., Tel Aviv (IL)
Filed by NEUROBLADE LTD., Tel Aviv (IL)
Filed on Apr. 19, 2023, as Appl. No. 18/302,847.
Application 18/302,847 is a continuation of application No. 18/297,172, filed on Apr. 7, 2023.
Application 18/297,172 is a continuation of application No. PCT/US2021/055472, filed on Oct. 18, 2021.
Claims priority of provisional application 63/230,212, filed on Aug. 6, 2021.
Claims priority of provisional application 63/198,429, filed on Oct. 16, 2020.
Claims priority of provisional application 63/198,426, filed on Oct. 16, 2020.
Claims priority of provisional application 63/093,968, filed on Oct. 20, 2020.
Claims priority of provisional application 63/092,689, filed on Oct. 16, 2020.
Claims priority of provisional application 63/092,682, filed on Oct. 16, 2020.
Claims priority of provisional application 63/092,671, filed on Oct. 16, 2020.
Claims priority of provisional application 63/092,658, filed on Oct. 16, 2020.
Claims priority of provisional application 63/092,647, filed on Oct. 16, 2020.
Prior Publication US 2023/0259423 A1, Aug. 17, 2023
Int. Cl. G06F 13/16 (2006.01); G06F 9/50 (2006.01); G06F 11/10 (2006.01); G06F 13/40 (2006.01); G06F 17/16 (2006.01)
CPC G06F 13/1694 (2013.01) [G06F 9/5016 (2013.01); G06F 11/1044 (2013.01); G06F 13/1668 (2013.01); G06F 13/404 (2013.01); G06F 17/16 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computational memory system comprising:
at least one computational memory chip including one or more processor subunits and one or more memory banks, formed on a common substrate; and
at least one local error correction code (ECC) module configured for calculating an original ECC based on received data, at least one local ECC module associated with at least one of the processor subunits and/or at least one of the memory banks,
wherein the received data is stored in the one or more memory banks as stored data, and the local ECC module is configured for storing the original ECC in association with the stored data,
wherein the at least one local ECC module is configured for calculating a new ECC based on the stored data,
wherein the at least one local ECC module is configured to generate an ECC indicator based on a comparison of the new ECC to the original ECC, and
wherein the at least one local ECC module is configured for transmitting the ECC indicator in-band with transmission of the stored data, out-of-band from transmission of the stored data, or via a second memory interface.