CPC G06F 12/145 (2013.01) [G06F 11/108 (2013.01)] | 20 Claims |
1. A memory system comprising a memory apparatus and a memory controller coupled with the memory apparatus, wherein:
the memory apparatus includes at least one memory chip, and each memory chip includes a plurality of memory planes, each memory plane having a plurality of pages, a plurality of pages located at a same position in each of the memory planes of the at least one memory chip form a page line, the memory apparatus includes a plurality of tag groups; each tag group having a plurality of page lines;
the memory controller is configured to:
when the memory apparatus is powered down and then powered on, respectively perform, in sequence, a recoding operation on all pages of which states are programmed states in each tag group;
according to an encoding result corresponding to each tag group, respectively determine whether check data corresponding to each tag group is abnormal; and
upon determining that the check data corresponding to a tag group is abnormal, correct an address of a starting encoded page of a last page line in the tag group.
|