	US 12,277,067 B2
	Memory array page table walk
Perry V. Lea, Plano, TX (US)
Filed by Lodestar Licensing Group LLC, Evanston, IL (US)
Filed on May 30, 2023, as Appl. No. 18/203,143.
Application 18/203,143 is a continuation of application No. 17/531,551, filed on Nov. 19, 2021, granted, now 11,663,137.
Application 17/531,551 is a continuation of application No. 16/556,989, filed on Aug. 30, 2019, granted, now 11,182,304, issued on Nov. 23, 2021.
Application 16/556,989 is a continuation of application No. 15/437,982, filed on Feb. 21, 2017, granted, now 10,402,340, issued on Sep. 3, 2019.
Prior Publication US 2023/0401158 A1, Dec. 14, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/1009 (2016.01); G06F 12/0864 (2016.01); G06F 12/1027 (2016.01); G06F 12/1045 (2016.01)

CPC G06F 12/1009 (2013.01) [G06F 12/0864 (2013.01); G06F 12/1027 (2013.01); G06F 12/1045 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/1028 (2013.01); G06F 2212/651 (2013.01); G06F 2212/652 (2013.01); G06F 2212/684 (2013.01)]

17 Claims

1. An apparatus, comprising:

an array of memory cells;

sensing circuitry coupled to the array of memory cells; and

one or more compute components included in the array, the one or more compute components configured to:

perform a number of operations based at least in part on a physical address of a portion of data stored in the array, wherein the one or more compute components are configured to perform the number of operations in response to a command from a host, the command comprising an indication of the physical address associated with the portion of the data stored in the array;

use the physical address as an input to a table to obtain at least one result of the number of operations, wherein the table is associated with the array, and wherein the at least one result comprises a result of a respective logical operation; and

store the at least one result of the number of operations without transferring the at least one result outside the array.