US 11,956,953 B2
Joint opening structures of three-dimensional memory devices and methods for forming the same
Zhenyu Lu, Hubei (CN); Wenguang Shi, Hubei (CN); Guanping Wu, Hubei (CN); Feng Pan, Hubei (CN); Xianjin Wan, Hubei (CN); and Baoyou Chen, Hubei (CN)
Assigned to Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Sep. 21, 2022, as Appl. No. 17/934,161.
Application 17/934,161 is a continuation of application No. 16/951,141, filed on Nov. 18, 2020, granted, now 11,482,532.
Application 16/951,141 is a continuation of application No. 16/046,847, filed on Jul. 26, 2018, granted, now 10,886,291, issued on Jan. 5, 2021.
Application 16/046,847 is a continuation of application No. PCT/CN2018/077785, filed on Mar. 1, 2018.
Claims priority of application No. 201710134782.1 (CN), filed on Mar. 8, 2017; and application No. 201710134783.6 (CN), filed on Mar. 8, 2017.
Prior Publication US 2023/0016627 A1, Jan. 19, 2023
Int. Cl. H10B 43/00 (2023.01); H10B 43/10 (2023.01); H10B 43/20 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01)
CPC H10B 43/20 (2023.02) [H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first stacked layer;
an insulating layer disposed over the first stacked layer;
a second stacked layer disposed over the insulating layer; and
a channel structure penetrating the second stacked layer, the insulating layer and the first stacked layer;
wherein a diameter of a portion of the channel structure located in the insulating layer is larger than a diameter of a portion of the channel structure located in the first stacked layer, wherein the channel structure is continuous, and wherein a bottom portion of the channel structure comprises:
a bottom surface lower than a bottom surface of the first stacked layer; and
a top surface higher than the bottom surface of the first stacked layer and lower than a top surface of the first stacked layer.