CPC H10B 12/315 (2023.02) [H10B 12/0335 (2023.02); H10B 12/34 (2023.02); H10B 12/482 (2023.02)] | 10 Claims |
1. A semiconductor device, comprising:
a bit line structure formed over the substrate;
a storage node contact plug spaced apart from the bit line structure; and
a nitride spacer positioned between the bit line structure and the storage node contact plug,
wherein the nitride spacer has the lowest silicon content in a central portion, and has a higher silicon content in a portion adjacent to the storage node contact plug than in the central portion.
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