CPC H04N 19/105 (2014.11) [H04N 19/132 (2014.11); H04N 19/159 (2014.11); H04N 19/176 (2014.11); H04N 19/46 (2014.11); H04N 19/82 (2014.11)] | 1 Claim |
1. A video signal decoding device comprising a processor,
wherein the processor is configured to:
determine whether an ISP (Intra Sub Partitions) mode is applied to a current block when intra-prediction is performed on the current block;
generate a reference sample for the current block;
configure a value of a filter flag specifying a filter coefficient of an interpolation filter applied to the reference sample;
generate a prediction sample of the current block by performing filtering for the reference sample by using the interpolation filter having the filter coefficient specified by the filter flag; and
reconstruct the current block on the basis of the prediction sample.
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