CPC H04N 1/00949 (2013.01) [H04N 1/00039 (2013.01); H04N 1/00047 (2013.01); H04N 1/00076 (2013.01)] | 18 Claims |
1. An information processing apparatus comprising
a processor configured to
evaluate a performance of each of a plurality of combinations of processes, each combination including a series of processes, the plurality of combinations being included in a plurality of processes, the series of processes being configured to be performed on an image, the performance being evaluated on a basis of a result of performing the series of processes on a test image for each combination, and
output an evaluation result for at least two combinations,
wherein the processor is configured not to output the evaluation result for processes that do not meet an output condition, among the plurality of processes.
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