CPC H03H 11/28 (2013.01) [G05F 1/56 (2013.01); H03K 5/24 (2013.01)] | 17 Claims |
1. A semiconductor device comprising:
an on-die resistor circuit comprising an on-die resistor;
a calibration circuit configured to perform a calibration operation on the on-die resistor, the calibration including a second node;
a calibration control circuit configured to control the calibration operation of the calibration circuit;
a first pad connected to the on-die resistor circuit through a third node and the calibration circuit; and
a second pad connected the calibration circuit,
wherein the calibration circuit comprises:
a current generating circuit configured to supply a calibration current to the on-die resistor; and
a comparing circuit configured to compare a magnitude of a first input signal that is generated by the calibration current and the on-die resistor with a magnitude of a second input signal that is generated by the calibration current and an external resistor,
wherein a first terminal of the on-die resistor is connected to the third node through a first switch and is connected to the second node through a second switch, and
wherein a second terminal of the on-die resistor is connected to a ground terminal.
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