US 11,955,556 B2
Semiconductor devices and methods of manufacturing the same
Woocheol Shin, Seoul (KR); Sunggi Hur, Hwaseong-si (KR); Sangwon Baek, Hwaseong-si (KR); and Junghan Lee, Anyang-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jun. 9, 2022, as Appl. No. 17/836,416.
Application 17/836,416 is a continuation of application No. 17/034,421, filed on Sep. 28, 2020, granted, now 11,387,367.
Claims priority of application No. 10-2020-0018853 (KR), filed on Feb. 17, 2020.
Prior Publication US 2022/0302316 A1, Sep. 22, 2022
Int. Cl. H01L 29/786 (2006.01); H01L 21/02 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/78618 (2013.01) [H01L 21/02236 (2013.01); H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66636 (2013.01); H01L 29/66742 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming a fin structure, the fin structure including sacrificial lines and semiconductor lines that are alternately and repeatedly stacked in a vertical direction, the vertical direction perpendicular to an upper surface of a substrate;
forming a dummy gate structure on the substrate covering a portion of the fin structure;
removing a portion of the fin structure at each of first and second sides of the dummy gate structure to form a first opening, the first side opposite the second side;
forming a source/drain layer in the first opening;
forming an insulating interlayer on the substrate covering the dummy gate structure and the source/drain layer;
removing the dummy gate structure and the sacrificial lines to form second and third openings, respectively, the third opening exposing a portion of a sidewall of the source/drain layer;
oxidizing the exposed portion of the sidewall of the source/drain layer to form an oxide layer;
removing the oxide layer to form a fourth opening, the fourth opening having an enlarged width greater than a width of the third opening, the width of the third opening and the fourth opening in a horizontal direction that is parallel to the upper surface of the substrate; and
forming a gate structure in the second and fourth openings.