CPC H01L 29/7851 (2013.01) [H01L 21/02236 (2013.01); H01L 21/02532 (2013.01); H01L 21/30604 (2013.01); H01L 21/31111 (2013.01); H01L 29/0673 (2013.01); H01L 29/0847 (2013.01); H01L 29/165 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/78654 (2013.01); H01L 29/78696 (2013.01); H01L 29/7848 (2013.01)] | 20 Claims |
1. A method of fabrication of a multi-gate semiconductor device, comprising:
providing a fin having a plurality of a first type of epitaxial layers and a plurality of a second type of epitaxial layers;
forming a gate stack over a channel region of the fin;
oxidizing each of the plurality of the second type of epitaxial layers in a source/drain region of the fin, wherein the oxidizing forms a plurality of oxide layers, an oxide layer of the plurality of oxide layers interposing each of the plurality of the first type of epitaxial layers; and
after oxidizing, growing a source/drain epitaxial layer on the source/drain region of the fin.
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