US 11,955,523 B2
Semiconductor device including a gate structure
Namgyu Cho, Seoul (KR); Minwoo Song, Seongnam-si (KR); Ohseong Kwon, Hwaseong-si (KR); Wandon Kim, Seongnam-si (KR); Hyeokjun Son, Seoul (KR); and Jinkyu Jang, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Feb. 23, 2023, as Appl. No. 18/113,116.
Application 18/113,116 is a continuation of application No. 17/388,269, filed on Jul. 29, 2021, granted, now 11,594,604.
Claims priority of application No. 10-2020-0138208 (KR), filed on Oct. 23, 2020.
Prior Publication US 2023/0197806 A1, Jun. 22, 2023
Int. Cl. H01L 29/417 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/775 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/41791 (2013.01) [H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823462 (2013.01); H01L 21/823468 (2013.01); H01L 29/0673 (2013.01); H01L 29/41733 (2013.01); H01L 29/4236 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/775 (2013.01); H01L 29/7854 (2013.01); H01L 29/7855 (2013.01); H01L 29/78696 (2013.01); H01L 29/4966 (2013.01); H01L 29/7848 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming an active fin on a substrate, the active fin extending in a first direction;
forming a dummy gate structure to cover the active fin on a substrate, the dummy gate structure extending a second direction intersecting the first direction;
forming a pair of gate spacers on both sides of the dummy gate structure, the pair of gate spacers extending in the second direction;
removing the dummy structure to form a trench extending in the second direction between the pair of gate spacers;
forming a gate insulating film on an upper surface and lateral surfaces of the active fin and on inner sidewalls of the pair of gate spacers in the trench;
forming a first gate electrode on a first portion of the gate insulating film corresponding to the upper surface and the lateral surfaces of the active fin, the first gate electrode not disposed on second and third portions of the gate insulating film corresponding to the inner sidewalls of the pair of gate spacers, respectively; and
forming a second gate electrode on the first gate electrode and on the second and third portions of the gate insulating film.